FabGL
ESP32 Display Controller and Graphics Library
MCP23S17.h
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1 /*
2  Created by Fabrizio Di Vittorio (fdivitto2013@gmail.com) - <http://www.fabgl.com>
3  Copyright (c) 2019-2021 Fabrizio Di Vittorio.
4  All rights reserved.
5 
6  This file is part of FabGL Library.
7 
8  FabGL is free software: you can redistribute it and/or modify
9  it under the terms of the GNU General Public License as published by
10  the Free Software Foundation, either version 3 of the License, or
11  (at your option) any later version.
12 
13  FabGL is distributed in the hope that it will be useful,
14  but WITHOUT ANY WARRANTY; without even the implied warranty of
15  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16  GNU General Public License for more details.
17 
18  You should have received a copy of the GNU General Public License
19  along with FabGL. If not, see <http://www.gnu.org/licenses/>.
20  */
21 
22 
23 
24 #pragma once
25 
26 
27 
28 #include "driver/spi_master.h"
29 
30 #include "fabutils.h"
31 
32 
33 
43 namespace fabgl {
44 
45 
46 
47 #define MCP_SPI_FREQ 10000000 // it seems to work up to 23000000!! (but datasheet specifies 10000000)
48 #define MCP_DMACHANNEL 2
49 
50 
51 #define MCP_PORTA 0
52 #define MCP_PORTB 1
53 
54 
55 #define MCP_A0 0
56 #define MCP_A1 1
57 #define MCP_A2 2
58 #define MCP_A3 3
59 #define MCP_A4 4
60 #define MCP_A5 5
61 #define MCP_A6 6
62 #define MCP_A7 7
63 
64 #define MCP_B0 8
65 #define MCP_B1 9
66 #define MCP_B2 10
67 #define MCP_B3 11
68 #define MCP_B4 12
69 #define MCP_B5 13
70 #define MCP_B6 14
71 #define MCP_B7 15
72 
73 
74 // bank 0 registers (A = reg + 0, B = reg + 1)
75 #define MCP_IODIR 0x00
76 #define MCP_IPOL 0x02
77 #define MCP_GPINTEN 0x04
78 #define MCP_DEFVAL 0x06
79 #define MCP_INTCON 0x08
80 #define MCP_IOCON 0x0A
81 #define MCP_GPPU 0x0C
82 #define MCP_INTF 0x0E
83 #define MCP_INTCAP 0x10
84 #define MCP_GPIO 0x12
85 #define MCP_OLAT 0x14
86 
87 
88 // bank 1 registers (A = reg + 0, B = reg + 0x10)
89 #define MCP_BNK1_IODIR 0x00
90 #define MCP_BNK1_IPOL 0x01
91 #define MCP_BNK1_GPINTEN 0x02
92 #define MCP_BNK1_DEFVAL 0x03
93 #define MCP_BNK1_INTCON 0x04
94 #define MCP_BNK1_IOCON 0x05
95 #define MCP_BNK1_GPPU 0x06
96 #define MCP_BNK1_INTF 0x07
97 #define MCP_BNK1_INTCAP 0x08
98 #define MCP_BNK1_GPIO 0x09
99 #define MCP_BNK1_OLAT 0x0A
100 
101 
102 // IOCON bits
103 #define MCP_IOCON_BANK 0x80 // Controls how the registers are addressed (0 = bank0)
104 #define MCP_IOCON_MIRROR 0x40 // INT Pins Mirror bit (1 = mirrored)
105 #define MCP_IOCON_SEQOP 0x20 // Sequential Operation mode bit (1 = not increment)
106 #define MCP_IOCON_DISSLW 0x10 // Slew Rate control bit for SDA output (I2C only)
107 #define MCP_IOCON_HAEN 0x08 // Hardware Address Enable bit
108 #define MCP_IOCON_ODR 0x04 // Configures the INT pin as an open-drain output (1 = open-drain)
109 #define MCP_IOCON_INTPOL 0x02 // This bit sets the polarity of the INT output pin (1 = active-high)
110 
111 
112 #define MCP_GPIO2REG(basereg, gpio) ((basereg) + ((gpio) >> 3))
113 #define MCP_GPIO2MASK(gpio) (1 << ((gpio) & 7))
114 
115 
119 enum class MCPDir {
120  Input,
121  Output
122 };
123 
124 
128 enum class MCPIntTrigger {
129  DefaultChange,
131 };
132 
133 
148 class MCP23S17 {
149 
150 public:
151 
152  MCP23S17();
153  ~MCP23S17();
154 
155 
157 
158 
169  bool begin(int MISO = -1, int MOSI = -1, int CLK = -1, int CS = -1, int CSActiveState = -1, int host = HSPI_HOST);
170 
171  void end();
172 
189  void initDevice(uint8_t hwAddr);
190 
191 
193 
194 
211  void writeReg(uint8_t addr, uint8_t value, uint8_t hwAddr = 0);
212 
221  uint8_t readReg(uint8_t addr, uint8_t hwAddr = 0);
222 
230  void writeReg16(uint8_t addr, uint16_t value, uint8_t hwAddr = 0);
231 
240  uint16_t readReg16(uint8_t addr, uint8_t hwAddr = 0);
241 
242 
244 
245 
252  void enableINTMirroring(bool value, uint8_t hwAddr = 0);
253 
260  void enableINTOpenDrain(bool value, uint8_t hwAddr = 0);
261 
268  void setINTActiveHigh(bool value, uint8_t hwAddr = 0);
269 
270 
272 
273 
286  void setPortDir(int port, uint8_t value, uint8_t hwAddr = 0) { writeReg(MCP_IODIR + port, value, hwAddr); }
287 
296  uint8_t getPortDir(int port, uint8_t hwAddr = 0) { return readReg(MCP_IODIR + port, hwAddr); }
297 
305  void setPortInputPolarity(int port, uint8_t value, uint8_t hwAddr = 0) { writeReg(MCP_IPOL + port, value, hwAddr); }
306 
319  void enablePortPullUp(int port, uint8_t value, uint8_t hwAddr = 0) { writeReg(MCP_GPPU + port, value, hwAddr); }
320 
333  void writePort(int port, uint8_t value, uint8_t hwAddr = 0) { writeReg(MCP_OLAT + port, value, hwAddr); }
334 
348  uint8_t readPort(int port, uint8_t hwAddr = 0) { return readReg(MCP_GPIO + port, hwAddr); }
349 
361  void writePort16(uint16_t value, uint8_t hwAddr = 0) { writeReg16(MCP_OLAT, value, hwAddr); }
362 
375  uint16_t readPort16(uint8_t hwAddr = 0) { return readReg16(MCP_GPIO, hwAddr); }
376 
377 
379 
380 
394  void configureGPIO(int gpio, MCPDir dir, bool pullup = false, uint8_t hwAddr = 0);
395 
407  void writeGPIO(int gpio, bool value, uint8_t hwAddr = 0);
408 
421  bool readGPIO(int gpio, uint8_t hwAddr = 0);
422 
423 
425 
426 
448  void enableInterrupt(int gpio, MCPIntTrigger trigger, bool defaultValue = false, uint8_t hwAddr = 0);
449 
460  void disableInterrupt(int gpio, uint8_t hwAddr = 0);
461 
462 
464 
465 
474  uint8_t getPortIntFlags(int port, uint8_t hwAddr = 0) { return readReg(MCP_INTF + port, hwAddr); }
475 
484  uint8_t getPortIntCaptured(int port, uint8_t hwAddr = 0) { return readReg(MCP_INTCAP + port, hwAddr); }
485 
486 
488 
489 
503  void writePort(int port, void const * buffer, size_t length, uint8_t hwAddr = 0);
504 
519  void readPort(int port, void * buffer, size_t length, uint8_t hwAddr = 0);
520 
521 
522 private:
523 
524  bool SPIBegin(int CSActiveState);
525  void SPIEnd();
526 
527  gpio_num_t m_MISO;
528  gpio_num_t m_MOSI;
529  gpio_num_t m_CLK;
530  gpio_num_t m_CS;
531  spi_host_device_t m_SPIHost;
532 
533  spi_device_handle_t m_SPIDevHandle;
534 };
535 
536 
537 
538 
539 
540 
541 
542 
543 
544 } // fabgl namespace
545 
void writePort16(uint16_t value, uint8_t hwAddr=0)
Sets status of output pins of combined port A and B.
Definition: MCP23S17.h:361
bool readGPIO(int gpio, uint8_t hwAddr=0)
Reads input status of a pin.
Definition: MCP23S17.cpp:264
uint8_t getPortIntCaptured(int port, uint8_t hwAddr=0)
Reads status of input port when last interrupt has been triggered.
Definition: MCP23S17.h:484
void setPortInputPolarity(int port, uint8_t value, uint8_t hwAddr=0)
Sets input polarity.
Definition: MCP23S17.h:305
void writeReg16(uint8_t addr, uint16_t value, uint8_t hwAddr=0)
Writes 16 bit value to two consecutive registers.
Definition: MCP23S17.cpp:180
void enablePortPullUp(int port, uint8_t value, uint8_t hwAddr=0)
Enables/disables port pull-ups.
Definition: MCP23S17.h:319
uint8_t readReg(uint8_t addr, uint8_t hwAddr=0)
Reads 8 bit value from an internal register.
Definition: MCP23S17.cpp:158
MCPDir
Represents GPIO directioon.
Definition: MCP23S17.h:119
uint8_t readPort(int port, uint8_t hwAddr=0)
Gets status of input pins of specified port.
Definition: MCP23S17.h:348
bool begin(int MISO=-1, int MOSI=-1, int CLK=-1, int CS=-1, int CSActiveState=-1, int host=HSPI_HOST)
Initializes MCP23S17 driver.
Definition: MCP23S17.cpp:45
void writeGPIO(int gpio, bool value, uint8_t hwAddr=0)
Sets output status of a pin.
Definition: MCP23S17.cpp:255
This file contains some utility classes and functions.
void disableInterrupt(int gpio, uint8_t hwAddr=0)
Disables any interrupt on the specified pin.
Definition: MCP23S17.cpp:287
uint8_t getPortDir(int port, uint8_t hwAddr=0)
Gets port direction.
Definition: MCP23S17.h:296
Definition: canvas.cpp:32
void setPortDir(int port, uint8_t value, uint8_t hwAddr=0)
Sets port direction.
Definition: MCP23S17.h:286
void writeReg(uint8_t addr, uint8_t value, uint8_t hwAddr=0)
Writes 8 bit value to an internal register.
Definition: MCP23S17.cpp:141
void enableINTOpenDrain(bool value, uint8_t hwAddr=0)
Enables/disables the INT pin open-drain.
Definition: MCP23S17.cpp:226
MCP23S17 driver.
Definition: MCP23S17.h:148
MCPIntTrigger
Represents interrupt trigger mode.
Definition: MCP23S17.h:128
uint16_t readPort16(uint8_t hwAddr=0)
Gets status of input pins of combined port A and B.
Definition: MCP23S17.h:375
void setINTActiveHigh(bool value, uint8_t hwAddr=0)
Sets the polarity of the INT pins.
Definition: MCP23S17.cpp:233
void configureGPIO(int gpio, MCPDir dir, bool pullup=false, uint8_t hwAddr=0)
Configure a pin direction and pullup.
Definition: MCP23S17.cpp:240
void writePort(int port, uint8_t value, uint8_t hwAddr=0)
Sets status of output pins of specified port.
Definition: MCP23S17.h:333
void initDevice(uint8_t hwAddr)
Initializes additional MCP23S17 devices connected to the same SPI bus but with a different hardware a...
Definition: MCP23S17.cpp:96
void enableINTMirroring(bool value, uint8_t hwAddr=0)
Enables/disables INTs pins mirroring.
Definition: MCP23S17.cpp:219
uint16_t readReg16(uint8_t addr, uint8_t hwAddr=0)
Reads 16 bit value from two consecutive registers.
Definition: MCP23S17.cpp:197
uint8_t getPortIntFlags(int port, uint8_t hwAddr=0)
Reads interrupt flags for the specified port.
Definition: MCP23S17.h:474
void enableInterrupt(int gpio, MCPIntTrigger trigger, bool defaultValue=false, uint8_t hwAddr=0)
Enables interrupt on the specific pin.
Definition: MCP23S17.cpp:270