FabGL
ESP32 Display Controller and Graphics Library
MCP23S17.h
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1 /*
2  Created by Fabrizio Di Vittorio (fdivitto2013@gmail.com) - <http://www.fabgl.com>
3  Copyright (c) 2019-2021 Fabrizio Di Vittorio.
4  All rights reserved.
5 
6 
7 * Please contact fdivitto2013@gmail.com if you need a commercial license.
8 
9 
10 * This library and related software is available under GPL v3.
11 
12  FabGL is free software: you can redistribute it and/or modify
13  it under the terms of the GNU General Public License as published by
14  the Free Software Foundation, either version 3 of the License, or
15  (at your option) any later version.
16 
17  FabGL is distributed in the hope that it will be useful,
18  but WITHOUT ANY WARRANTY; without even the implied warranty of
19  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20  GNU General Public License for more details.
21 
22  You should have received a copy of the GNU General Public License
23  along with FabGL. If not, see <http://www.gnu.org/licenses/>.
24  */
25 
26 
27 
28 #pragma once
29 
30 
31 
32 #include "driver/spi_master.h"
33 
34 #include "fabutils.h"
35 
36 
37 
47 namespace fabgl {
48 
49 
50 
51 #define MCP_SPI_FREQ 10000000 // it seems to work up to 23000000!! (but datasheet specifies 10000000)
52 #define MCP_DMACHANNEL 2
53 
54 
55 #define MCP_MAXDEVICES 2
56 
57 
58 #define MCP_PORTA 0
59 #define MCP_PORTB 1
60 
61 
62 #define MCP_A0 0
63 #define MCP_A1 1
64 #define MCP_A2 2
65 #define MCP_A3 3
66 #define MCP_A4 4
67 #define MCP_A5 5
68 #define MCP_A6 6
69 #define MCP_A7 7
70 
71 #define MCP_B0 8
72 #define MCP_B1 9
73 #define MCP_B2 10
74 #define MCP_B3 11
75 #define MCP_B4 12
76 #define MCP_B5 13
77 #define MCP_B6 14
78 #define MCP_B7 15
79 
80 
81 // bank 0 registers (A = reg + 0, B = reg + 1)
82 #define MCP_IODIR 0x00
83 #define MCP_IPOL 0x02
84 #define MCP_GPINTEN 0x04
85 #define MCP_DEFVAL 0x06
86 #define MCP_INTCON 0x08
87 #define MCP_IOCON 0x0A
88 #define MCP_GPPU 0x0C
89 #define MCP_INTF 0x0E
90 #define MCP_INTCAP 0x10
91 #define MCP_GPIO 0x12
92 #define MCP_OLAT 0x14
93 
94 
95 // bank 1 registers (A = reg + 0, B = reg + 0x10)
96 #define MCP_BNK1_IODIR 0x00
97 #define MCP_BNK1_IPOL 0x01
98 #define MCP_BNK1_GPINTEN 0x02
99 #define MCP_BNK1_DEFVAL 0x03
100 #define MCP_BNK1_INTCON 0x04
101 #define MCP_BNK1_IOCON 0x05
102 #define MCP_BNK1_GPPU 0x06
103 #define MCP_BNK1_INTF 0x07
104 #define MCP_BNK1_INTCAP 0x08
105 #define MCP_BNK1_GPIO 0x09
106 #define MCP_BNK1_OLAT 0x0A
107 
108 
109 // IOCON bits
110 #define MCP_IOCON_BANK 0x80 // Controls how the registers are addressed (0 = bank0)
111 #define MCP_IOCON_MIRROR 0x40 // INT Pins Mirror bit (1 = mirrored)
112 #define MCP_IOCON_SEQOP 0x20 // Sequential Operation mode bit (1 = not increment)
113 #define MCP_IOCON_DISSLW 0x10 // Slew Rate control bit for SDA output (I2C only)
114 #define MCP_IOCON_HAEN 0x08 // Hardware Address Enable bit
115 #define MCP_IOCON_ODR 0x04 // Configures the INT pin as an open-drain output (1 = open-drain)
116 #define MCP_IOCON_INTPOL 0x02 // This bit sets the polarity of the INT output pin (1 = active-high)
117 
118 
119 #define MCP_GPIO2REG(basereg, gpio) ((basereg) + ((gpio) >> 3))
120 #define MCP_GPIO2MASK(gpio) (1 << ((gpio) & 7))
121 
122 
126 enum class MCPDir {
127  Input,
128  Output
129 };
130 
131 
135 enum class MCPIntTrigger {
136  DefaultChange,
138 };
139 
140 
155 class MCP23S17 {
156 
157 public:
158 
159  MCP23S17();
160  ~MCP23S17();
161 
162 
164 
165 
176  bool begin(int MISO = -1, int MOSI = -1, int CLK = -1, int CS = -1, int CSActiveState = -1, int host = HSPI_HOST);
177 
181  void end();
182 
188  bool available() { return m_SPIDevHandle != nullptr; }
189 
206  void initDevice(uint8_t hwAddr);
207 
208 
210 
211 
228  void writeReg(uint8_t addr, uint8_t value, uint8_t hwAddr = 0);
229 
238  uint8_t readReg(uint8_t addr, uint8_t hwAddr = 0);
239 
247  void writeReg16(uint8_t addr, uint16_t value, uint8_t hwAddr = 0);
248 
257  uint16_t readReg16(uint8_t addr, uint8_t hwAddr = 0);
258 
259 
261 
262 
269  void enableINTMirroring(bool value, uint8_t hwAddr = 0);
270 
277  void enableINTOpenDrain(bool value, uint8_t hwAddr = 0);
278 
285  void setINTActiveHigh(bool value, uint8_t hwAddr = 0);
286 
287 
289 
290 
303  void setPortDir(int port, uint8_t value, uint8_t hwAddr = 0) { writeReg(MCP_IODIR + port, value, hwAddr); }
304 
313  uint8_t getPortDir(int port, uint8_t hwAddr = 0) { return readReg(MCP_IODIR + port, hwAddr); }
314 
322  void setPortInputPolarity(int port, uint8_t value, uint8_t hwAddr = 0) { writeReg(MCP_IPOL + port, value, hwAddr); }
323 
336  void enablePortPullUp(int port, uint8_t value, uint8_t hwAddr = 0) { writeReg(MCP_GPPU + port, value, hwAddr); }
337 
350  void writePort(int port, uint8_t value, uint8_t hwAddr = 0) { writeReg(MCP_OLAT + port, value, hwAddr); }
351 
365  uint8_t readPort(int port, uint8_t hwAddr = 0) { return readReg(MCP_GPIO + port, hwAddr); }
366 
378  void writePort16(uint16_t value, uint8_t hwAddr = 0) { writeReg16(MCP_OLAT, value, hwAddr); }
379 
392  uint16_t readPort16(uint8_t hwAddr = 0) { return readReg16(MCP_GPIO, hwAddr); }
393 
394 
396 
397 
411  void configureGPIO(int gpio, MCPDir dir, bool pullup = false, uint8_t hwAddr = 0);
412 
424  void writeGPIO(int gpio, bool value, uint8_t hwAddr = 0);
425 
438  bool readGPIO(int gpio, uint8_t hwAddr = 0);
439 
440 
442 
443 
465  void enableInterrupt(int gpio, MCPIntTrigger trigger, bool defaultValue = false, uint8_t hwAddr = 0);
466 
477  void disableInterrupt(int gpio, uint8_t hwAddr = 0);
478 
479 
481 
482 
491  uint8_t getPortIntFlags(int port, uint8_t hwAddr = 0) { return readReg(MCP_INTF + port, hwAddr); }
492 
501  uint8_t getPortIntCaptured(int port, uint8_t hwAddr = 0) { return readReg(MCP_INTCAP + port, hwAddr); }
502 
503 
505 
506 
520  void writePort(int port, void const * buffer, size_t length, uint8_t hwAddr = 0);
521 
536  void readPort(int port, void * buffer, size_t length, uint8_t hwAddr = 0);
537 
538 
539 private:
540 
541  bool SPIBegin(int CSActiveState);
542  void SPIEnd();
543 
544  gpio_num_t m_MISO;
545  gpio_num_t m_MOSI;
546  gpio_num_t m_CLK;
547  gpio_num_t m_CS;
548  spi_host_device_t m_SPIHost;
549 
550  spi_device_handle_t m_SPIDevHandle;
551 
552  // cached registers
553  uint8_t m_IOCON[MCP_MAXDEVICES];
554 };
555 
556 
557 
558 
559 
560 
561 
562 
563 
564 } // fabgl namespace
565 
void writePort16(uint16_t value, uint8_t hwAddr=0)
Sets status of output pins of combined port A and B.
Definition: MCP23S17.h:378
bool readGPIO(int gpio, uint8_t hwAddr=0)
Reads input status of a pin.
Definition: MCP23S17.cpp:274
uint8_t getPortIntCaptured(int port, uint8_t hwAddr=0)
Reads status of input port when last interrupt has been triggered.
Definition: MCP23S17.h:501
void setPortInputPolarity(int port, uint8_t value, uint8_t hwAddr=0)
Sets input polarity.
Definition: MCP23S17.h:322
void writeReg16(uint8_t addr, uint16_t value, uint8_t hwAddr=0)
Writes 16 bit value to two consecutive registers.
Definition: MCP23S17.cpp:193
void enablePortPullUp(int port, uint8_t value, uint8_t hwAddr=0)
Enables/disables port pull-ups.
Definition: MCP23S17.h:336
uint8_t readReg(uint8_t addr, uint8_t hwAddr=0)
Reads 8 bit value from an internal register.
Definition: MCP23S17.cpp:171
MCPDir
Represents GPIO directioon.
Definition: MCP23S17.h:126
uint8_t readPort(int port, uint8_t hwAddr=0)
Gets status of input pins of specified port.
Definition: MCP23S17.h:365
bool available()
Determines MCP23S17 availability.
Definition: MCP23S17.h:188
bool begin(int MISO=-1, int MOSI=-1, int CLK=-1, int CS=-1, int CSActiveState=-1, int host=HSPI_HOST)
Initializes MCP23S17 driver.
Definition: MCP23S17.cpp:50
void writeGPIO(int gpio, bool value, uint8_t hwAddr=0)
Sets output status of a pin.
Definition: MCP23S17.cpp:265
This file contains some utility classes and functions.
void disableInterrupt(int gpio, uint8_t hwAddr=0)
Disables any interrupt on the specified pin.
Definition: MCP23S17.cpp:297
void end()
Deinitializes MCP23S17 driver.
Definition: MCP23S17.cpp:112
uint8_t getPortDir(int port, uint8_t hwAddr=0)
Gets port direction.
Definition: MCP23S17.h:313
Definition: canvas.cpp:36
void setPortDir(int port, uint8_t value, uint8_t hwAddr=0)
Sets port direction.
Definition: MCP23S17.h:303
void writeReg(uint8_t addr, uint8_t value, uint8_t hwAddr=0)
Writes 8 bit value to an internal register.
Definition: MCP23S17.cpp:154
void enableINTOpenDrain(bool value, uint8_t hwAddr=0)
Enables/disables the INT pin open-drain.
Definition: MCP23S17.cpp:238
MCP23S17 driver.
Definition: MCP23S17.h:155
MCPIntTrigger
Represents interrupt trigger mode.
Definition: MCP23S17.h:135
uint16_t readPort16(uint8_t hwAddr=0)
Gets status of input pins of combined port A and B.
Definition: MCP23S17.h:392
void setINTActiveHigh(bool value, uint8_t hwAddr=0)
Sets the polarity of the INT pins.
Definition: MCP23S17.cpp:244
void configureGPIO(int gpio, MCPDir dir, bool pullup=false, uint8_t hwAddr=0)
Configure a pin direction and pullup.
Definition: MCP23S17.cpp:250
void writePort(int port, uint8_t value, uint8_t hwAddr=0)
Sets status of output pins of specified port.
Definition: MCP23S17.h:350
void initDevice(uint8_t hwAddr)
Initializes additional MCP23S17 devices connected to the same SPI bus but with a different hardware a...
Definition: MCP23S17.cpp:105
void enableINTMirroring(bool value, uint8_t hwAddr=0)
Enables/disables INTs pins mirroring.
Definition: MCP23S17.cpp:232
uint16_t readReg16(uint8_t addr, uint8_t hwAddr=0)
Reads 16 bit value from two consecutive registers.
Definition: MCP23S17.cpp:210
uint8_t getPortIntFlags(int port, uint8_t hwAddr=0)
Reads interrupt flags for the specified port.
Definition: MCP23S17.h:491
void enableInterrupt(int gpio, MCPIntTrigger trigger, bool defaultValue=false, uint8_t hwAddr=0)
Enables interrupt on the specific pin.
Definition: MCP23S17.cpp:280